Described how to install Quartus, but this was only a step towards the task. In order to make sure that FPGA and the programmer work, the first one had to be flashed.
It turned out that this can be done in two ways, the first is through JTAG interface, in this case the configuration information is flashed directly to the FPGA. The disadvantage of this method is that FPGA memory is volatile and the firmware must be loaded into the FPGA every time power is applied.

The way out of this situation suggests itself and it lies in Place a memory chip next to the FPGA and load the firmware from it every time after power is applied. The only thing worth adding is that the firmware is not stored in a regular flash drive, but in a special chip - a sequential configuration ROM. U Altera- these are microcircuits of the series EPCS or EPCQ, programmable via interface Active Serial. This is the second method, the point is to program the sequential configuration ROM chip, and after power is applied, the FPGA reads the firmware from it.
But this begs another question: is it possible that a separate connector is needed to program the serial configuration ROM chip?
It turns out that the FPGA developers took care of this and the FPGA can act as an intermediary between interfaces JTAG And Active Serial. That is, it receives the firmware by JTAG interface, and writes it to ROM using Active Serial. We've sorted out the theory and can start practicing.

At my request, the seller emailed me a schematic of the debug board and several simple projects. In one of the projects a file with the extension was found .sof, which is necessary for firmware.
In order to flash the FPGA using jtag necessary:

• run Quartus
• choose Programmer in the tab Tools

• specify the firmware file

• flash the FPGA by pressing a button Start, having previously installed the necessary checkboxes

• If the firmware is successfully installed, we see 100% Successful in the upper right corner

In the same folder where the .sof file was taken, a file with the extension .pof. Files with this extension must be flashed by connecting directly to the ROM, but I wanted to flash the board without unnecessary movements via jtag. To do this, from the .sof file it was necessary to obtain a file with the extension .jic.

To convert a .sof file to .jic you need:

• in the File menu select Convert Progamming Files

• in the menu that opens, select in the field Programming file type choose JTAG Indirect
  Configuration File (.jic)
• in field Configuration device select the type of ROM located on the board
• in field Mode select the firmware mode
• in field File name determine the name and directory of the output file

• in field Inputs File to Convert click on SOF Data, a button appears on the right side Add File, by clicking on which you can select the file to convert

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print version

Memory tests for ZX-Spectrum, flashed into ROM

Malfunctions related to RAM occupy an “honorable” niche among all possible reasons for the inoperability of Spectrums. Memory chips are relatively unreliable and tend to burn out (especially if there are power problems). And especially if the Spectrum's power source is transformer. How many times has it been noticed on my Leningrad-1 computer with a transformer power supply - you accidentally jump the computer power supply (+5V and ground), and one or two KR565RU5 microcircuits have already “flyed out”.

As a rule, the memory chip burns completely. Those. It’s not that one bit in it doesn’t work, but that the whole chip stops working. The Spectrum's memory is organized in such a way that each RAM chip is responsible for its own bit of memory (for a 48K Spectrum this is 8 chips, one bit each, for a total of 64KB of addressable memory). When the computer starts, the ROM performs its memory test, and if any RAM cell “fails,” the computer sets the limit of available memory to the address of the cell previous to the faulty one. In this case, the value of the limit of available memory is set in the system variable P_RAMT (it is located at addresses 23732-23733 in RAM. In a working computer, the value of this system variable will be equal to #FFFF (that is, the numbers 255 will be written in both memory cells). If in The system variable contains a number that is not equal to #FFFF, for example, if #F000 is there, this means that memory cell #F001 is already defective.

This is all very well, but only if the detected defective memory cell is not at the beginning of the available RAM. The fact is that for BASIC-48 to work, it also requires some kind of available, working memory. And if a memory defect is detected at the beginning of the RAM, then BASIC simply will not start, and we will not be able to find out anything. If one of the RAM chips burns out completely, the computer will not start BASIC.

Then all that remains is to “dance with a tambourine” to find what actually burned. Applicable to memory chips, you can try a primitive, but sometimes useful diagnostic. The fact is that a defective memory chip (KR565RU5) may differ in temperature from other working chips. When operating, the KR565RU5 RAM heats up. If you put your finger on the RAM chips, you can feel that the chips are noticeably warm. A faulty microcircuit can heat up like an iron, or it can be completely cold. This will not necessarily be the case, but this method can be remembered and applied from time to time.

In general, when producing Spectrums, the rules of good form are to install ROM and processor chips on the sockets. This makes life a lot easier when repairing your computer. In this case, we are interested in the ROM chip. In the "ancient" Spectrums produced in the late 80s (early 90s), as a rule, two ROM chips were installed. This was dictated by the fact that it was not so easy to get a 16K ROM chip (bourgeois name 27128) at that time, so it was easier and cheaper to replace it with two 8K chips, fortunately they had a domestic analogue KR573RF4, KR573RF6. And usually one of the microcircuits (usually ROM-0) was placed on the socket. Why ROM-0? Because The ROM is assembled on two chips, its address space is divided into two parts. The total ROM capacity is 16K. Therefore, the first 8K are considered as ROM-0, and the second 8K are considered ROM-1. When the computer starts, the processor begins executing the program located at address #0000, and this is precisely the area addressed by ROM-0.

So yes, we really need at least one ROM to be on the socket. If the computer board has only one ROM on the socket, this is also very good. The thing is that the ROM can be removed and replaced with your own ROM, in which the memory test is “stitched”. Then, when you turn on the computer, the memory test we need will be launched, which will clearly show what is going on with the memory in the computer.

A very, very long time ago, when I didn’t yet have a ROM programmer, I had to go to the radio market and there tough guys would flash anything into the ROM for the appropriate bribe. They also had memory tests for Spectrums. Yes, it was a good time then...

So, having bought the treasured flashed ROM chip, you could test your computer. However, first it was necessary to solve the question - how to correctly insert the ROM into the socket? The fact is that the ROM test is flashed into a 2K chip. It has 24 pins. The Spectrum uses 28-pin ROMs. In this case, pins 21 and 24 of the microcircuit with the test were raised and combined as follows:

Such a microcircuit is inserted into the socket as shown in the photo:

I think the photo shows everything clearly. Pin 12 of the ROM (GND) must match pin 14 in the socket. And the protruding pin of the test ROM should fall into the 28th pin of the socket (+5V power supply).

Instead of mutilating the ROM, you can make an adapter board. We put a 24-pin socket on top for the test ROM, and pins stick out from below for installing the board into a 28-pin socket in the computer. All required changes in connecting 21 and 24 ROM pins can be made directly on this board:

In my practice, I often use the following test firmware:

Test ROM for ZX-Spectrum 48K

As the name suggests, checks 48K RAM. It works very slowly (about 12 minutes). First, the screen attributes are cleared, then the screen is painted over and cleared one by one, then the RAM test results are shown. After this there is a ROM test, but it always ends with an error, but for us this does not matter. The main thing is to check the RAM.

ATTENTION!
This test has one “trick” - if you hold a space bar when starting the test, then the graphical part with shading of attributes is skipped and the RAM test begins directly. The test for the pressed spacebar is done at the moment when the selection of border colors at the beginning of the test ends.

Passing the test if one of the RAM chips is faulty can be seen in the first issue of Byte Tales #01:

BYT Tales #01 - Repairing the computer “Byte”

Another test ROM for ZX-Spectrum 48K

I am not entirely satisfied with the 48K memory test from the previous section of the page, so when I had free time and desire, I disassembled this test and, based on it, “cut down” my own version, in which I tried to realize my “wants”.

The result was a slightly more advanced memory test, in which I added several memory testing algorithms, threw out unnecessary code from the test (there is plenty of it), and also made a “jammer” of the synthesizer on the KR580VI53 in the case of using the test on the “Byte” computer.

You can download the test firmware along with all the sources for iS-DOS (the test is written in iS-Assembler) at the end of this page.

ROM test for ZX-Spectrum 48K (from the magazine "Radio Amateur" 1995 No. 9

In the magazine "Radio Amateur" No. 9 for 1995, a dump of a ROM test for the ZX-Spectrum 48 authored by G. Ulanovsky was published.

The peculiarity of the test is that it does not display text on the screen - all information about the performance of the RAM is displayed in the form of lines on the border. This can be useful in case of complete inoperability of the RAM, when when displaying text on the screen nothing will be visible, and the lines on the border will be clearly visible (the output of information on the border does not depend on the performance and availability of RAM in general).

After the test is completed, 8 white stripes are displayed on the border, symbolizing 8 bits of RAM. The first bar from the top shows the serviceability of the D0 bit, the second - D1, the third - D2, etc. If the corresponding bit of RAM is operational, the band will be narrow:

In the case of a faulty bit, the bandwidth will be twice as wide:

The disadvantage of the test is that it only checks the first 16K of RAM (at addresses #4000-#7FFF). However, this can be easily fixed by changing the test source.

The test occurs in 4 stages (filling and checking for bytes #00, #FF, #55 and #AA). If desired, you can add other options for checking RAM to the source text.

As an example, I modified the test to check the entire amount of 48K RAM, and also inserted into the source the procedure for jamming KR580VI53 for the Byte computer. Firmware for two test options and sources can be downloaded at the end of this article.

Test ROM for ZX-Spectrum 128K

This test allows you to quickly check the memory in the 128th ZX-Spectrum.

You can see how the test runs on a working computer in the following video:

There should be a video here, but it won't work unless you enable JavaScript for this site.

After the message about a successful ROM test, a loop occurs; you can ignore this.

When working on some On computers with a connected drive controller, glitches are possible when passing the test. The fact is that when connecting the drive controller, a modification is made that prohibits the selection of any ports when the controller is operating. For example, what is recommended to do when connecting the C-48 controller to the ZX-Spectrum:

The conductor running from the /IORQ output of the processor to the computer circuit is broken, and a logical element that switches the /IORQ signal is connected to the break.

This is done in order to disable possible computer ports that conflict with the drive controller ports. First of all, this is the Kempston port of the joystick. However, no one will look for a specific computer model to see what might conflict with the drive controller, so it’s easier to disable access to ports altogether while the drive controller is working.

Second point: again in some On computers modified in this way, TR-DOS is immediately launched upon reset. This is done so that every time from under BASIC you do not have to “type” the RANDOMIZE USR 15616 command to start TR-DOS.

Third point: again in some On computers, ROM with BASIC is combined with ROM TR-DOS in one chip. For example, like in this computer Leningrad-1:

Programmer- a hardware and software device designed to write/read information into a permanent storage device (write once, flash memory, ROM, internal memory of microcontrollers and PLCs).

Programmer- this is a device that enters the information necessary for operation into programmable non-volatile digital chips, such as PROM (ROM), EPROM (PROM), EEPROM (EEPROM), Flash, PAL, GAL, FPGA And microcontrollers. The recording process is often called " ", " ", " ", " ".

Flash ROM, flash ROM

"Flash ROM"- write information to ROM.

Back when computers were large, from the mid-1950s to the mid-1970s, computers used magnetic core memory. This memory was used both as RAM and ROM. When making the ROM, the wire either passed through the ring or bypassed it. The wire was passed through a ferrite ring using a special needle. That is "stitched" memory matrix in the literal sense. Therefore, this process was quite naturally assigned the definition "flash ROM". In order to do it right "flash", created a technological document "firmware map" which indicated which rings to pass the wire through and which not. Memory on ferrite cores is a thing of the past, however, the term "flash" And "firmware" in relation to the process of writing to ROM is still used today. Moreover the word "firmware" used both as a verb in relation to the process of entering information into ROM, and as a noun in relation to the information or file being entered itself.

Unlike semiconductors, magnetic cores are not afraid of radiation and electromagnetic radiation, and therefore, magnetic core memory continued to be used in military and space systems for some time. It is reliably known that it was used in the Shuttle on-board computers until 1991. Perhaps such memory is still used in some older systems. Currently, semiconductor memory resistant to special effects has already been developed, and the era of magnetic cores is gone, but the term "firmware" remained.

Burning ROM

"Burn ROM"- entering information.

Memory on ferrite cores was replaced by semiconductor RAM memory, and microcircuits with matrices of metal, often nichrome, jumpers inside began to be used as ROM. To enter information into such microcircuits, excess jumpers must be burned with a current pulse. Subsequently, jumpers began to be used not only from metal, but also made from semiconductors, in the form p-n junction or polysilicon, but the principle of physical destruction of the jumper or breakdown of the junction by
the impact of the current pulse was preserved. Such ROMs are still used in military and aerospace systems today. All ChipStar programmers for special purpose microcircuits are "burn through" such ROMs.

Recording, loading ROM

In domestic and industrial applications, where the requirements for resistance to external factors are lower, and the requirements for cost and memory capacity are higher, chips with fused jumpers have been supplanted by electrically programmable EPROM chips and electrically reprogrammable EEPROM ROM chips, and, more recently, by chips with based on FLASH. With the change in technology, the terminology also changed: they began to talk more often about ROM "writes", or "loading", and the term is more often used in relation to the internal ROM of microcontrollers, and “write” is more often used in relation to stand-alone memory chips.

Programming ROM or microcontroller

"Programming ROM or microcontroller"- entering information into ROM or microcontroller.

Term "programming" also very often applied to the process of writing to ROM. And, if in relation to ROM it is always perceived unambiguously, then in relation to microcontrollers ambiguity arises: "Program the microcontroller" can mean either writing a ready-made program code (image) into the microcontroller ROM using a hardware device (programmer, download cable), or the process of developing the program itself.

P.S. P.S

You will say that it is so easy to get confused in all this terminology, and you will be absolutely right. But in the English-speaking environment everything is no better! Not only are they all the same "burns" ("burn"), "downloads"("download"), "record"("write"), so are the terms "programmer"- the person who develops the program and "programmer"- the device that writes this program into the microcircuit is denoted in one word: "programmer".

Microprogram machines represent the next step in increasing the sophistication of digital circuit intelligence. Based on microprogrammed automata, it is possible to build devices that operate according to rather complex algorithms, perform various functions determined by input signals, and produce complex sequences of output signals. In this case, the operating algorithm microprogram machine can be easily changed by replacing the ROM firmware.

Unlike the previously considered “hard” logic devices, the principle of operation of which is uniquely determined by the elements used and the method of their connection, microprogram machines using the same circuit can perform a variety of functions. That is, they are much more flexible than circuits based on “hard” logic. In addition, design microprogram machines From a circuit design point of view it is quite simple. The disadvantage of any microprogram machine Compared to circuits based on “hard” logic, there is a lower maximum performance and the need to compile a ROM firmware map with microprograms, often quite complex.

Most common structure microprogram machine(Fig. 11.15) includes only three elements: ROM, an edge-triggered register, and clock generator.

Rice. 11.15.

The ROM has (L+M) address bits and N data bits. The register is applied with a number of digits (N + L). ROM data bits are written to the register on a positive edge clock signal from the generator. Part of these bits (M) is used to form the ROM address, the other part (N-M) is used to generate output signals. Input signals (L) are supplied to the register inputs and are used in conjunction with a portion of the ROM output bits to obtain the ROM address.

The scheme works as follows. At each clock cycle, the ROM produces a data code, thereby determining not only the state of the circuit's output signals, but also the ROM address, which will be set in the next clock cycle (after the next positive edge clock signal). This next address is also affected by input signals. That is, unlike the signal sequencer discussed in the previous section, in this case the addresses can be sorted not only sequentially (using a counter), but also in an arbitrary order, which is determined by the ROM firmware, called firmware.

The condition for the correct operation of the circuit is the following. For one period clock signal The register and ROM must have time to operate. In other words, the sum of the register delay and the ROM address fetch delay should not exceed the period clock signal. Note also that the input signals microprogram machine cannot be applied directly to the address inputs of the ROM (without a register), since their asynchronous (with respect to the clock signal) change can cause a transient process at the ROM data outputs precisely at the moment when the ROM output signals are written to the register. As a result, incorrect information may be written to the register, which will disrupt the operation of the entire circuit. The register synchronizes changes in input signals with the clock signal, as a result of which all bits of the ROM address code change simultaneously - along the positive edge clock signal. The register must be edge-triggered; the use of a latch register is not allowed, as it can cause an avalanche-like transient process.

The possibilities of such a simple scheme turn out to be very great. For example, microprogram machine can produce sequences of output signals in response to a specific change in input signals. It can also temporarily stop output signals until input signals arrive. It can analyze the duration of the input signal and, depending on it, produce certain output signals. It can do a lot of other things too.

Let us formulate several elementary functions from which the operating algorithms of a microprogram automaton can be composed (Fig. 11.16):

Rice. 11.16.

1. Sequential search ROM addresses (for example, to issue a sequence of output signals).
2. Periodically repeating a sequence of ROM addresses (for example, to repeat a sequence of output signals).
3. Stopping at some ROM address (for example, to wait for an input signal to change).
4. Temporarily disabling the reaction to input signals (for example, in order to finish working out the reaction to a previous change in input signals). This function is not shown in the figure.

As an example, consider the execution of some elementary functions microprogram machine, shown in Fig. 11.17.

Rice. 11.17.

The ROM has a 64x8 organization (it can be two PE3 chips or one RT18 chip), the number of register bits is ten (it can be two IR27 chips). The circuit has two input signals and four output signals. Such an organization microprogram machine The good thing is that its microprogram (that is, the ROM firmware map) is very clear, easy to compose and read.

Table 11.7. ROM firmware card 64x8 for microprogram machine

Address	0	1	2	3	4	5	6	7	8	9	A	B	C	D	E	F
00	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF
10	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF
20	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF
30	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF	FF

The output bits of the ROM data are divided into two groups of 4 signals: the low ones go to form the next ROM address, the high ones form four output signals. Input signals arrive (via a register) to the two most significant bits of the ROM address. If we depict the ROM firmware map in the usual form of a table of four rows and 16 columns (Table 11.7), then this table will clearly show both the state of each of the internal signals, as well as the circuit’s response to any input signal, as well as the states all output signals in each clock cycle.

First of all, it is easy to notice that the selection of one or another table row is made by the most significant bits of the ROM address code, that is, by the input signals microprogram machine. Thus, any change in the input signals leads to a transition to another line in the firmware map. For example, line 00 will correspond to zero input signals microprogram machine, and line 30 - single input signals.

Table 11.8. Example of firmware for the circuit in Fig. 11.17

Address	0	1	2	3	4	5	6	7	8	9	A	B	C	D	E	F
00	11	22	33	44	55	66	77	88	99	A.A.	BB	CC	DD	E.E.	FF	00
10	11	22	33	44	55	66	77	88	99	55	BB	CC	DD	E.E.	FF	00
20	10	21	32	43	54	65	76	87	98	A9	B.A.	C.B.	DC	ED